ALMA project

ALgorithm parallelization for Multicore Architectures.

Simplifying programming for multi-cores

Why must a programmer care for the hardware architecture when programming embedded applications on a multiprocessor Systems-on-Chip?
The ALMA project intends to change that 'MUST' into a 'MAY'. We work to develop a programming tool chain that hides the complexity of applications and architectures from the programmer, and creates optimized code at the same time.

Workshop on 5 September, 2014

From Scilab to High Performance Embedded Multicore Systems:
The ALMA Project Approach

The mapping process of high performance embedded applications to today’s multiprocessor system on chip devices suffers from a complex toolchain and programming process. The problem here is the expression of parallelism with a pure imperative programming language which is commonly C. This traditional approach limits the mapping, partitioning and the generation of optimized parallel code, and consequently the achievable performance and power consumption of applications from different domains. The Architecture oriented paraLlelization for high performance embedded Multicore systems using scilAb (ALMA) project aims to bridge these hurdles through the introduction and exploitation of a Scilab-based toolchain which enables the efficient mapping of applications on multiprocessor platforms from high level of abstraction. This holistic solution of the toolchain allows the complexity of both the application and the architecture to be hidden, which leads to a better acceptance, reduced development cost and shorter time-to-market. Driven by the technology restrictions in chip design, the end of Moore’s law and an unavoidable increasing request of computing performance, ALMA is a fundamental step forward in the necessary introduction of novel computing paradigms and methodologies.

Within the session, we’ll present the ALMA approach for automatic compiling Matlab-like Scilab code to high-performance multicore systems. It will start with an overview of the overall project and the researched solution, followed by in-detail presentations of the toolchain components. The ALMA reconfigurable target architectures will be introduces together with their specification within an Architecture Description Language (ADL). In the following, the ADL-based coarse- and fine-grain parallelism extraction algorithms will be introduced. At the end of the session, we will demonstrate the toolchain usage from an end user perspective..

Workshop program




9:00 - 9:30

Can programming of multi-core systems be easier, please? - The ALMA Approach

Timo Stripf (KIT)

9:30 - 10:00

An architecture description language for target-agnostic multi-core compilation

Thomas Bruckschlögl (KIT)

10:00 – 10:30

From Scilab to Static C Code

Timo Stripf (KIT)

10:30 – 11:00

Coffee break

11:00 – 11:45

ADL-based fine-grain optimizations within the ALMA flow

Ali Hassan El Moussawi (UR1)

11:45 – 12:30

Mapping and Scheduling Coarse Grain Hierarchical Task Graphs on Multi-core Architectures

Antoine Morvan (UR1)

Panayiotis Alefragis (TWG)

-- Lunch Break --




14:00 – 14:45

From Hierarchical Task Graphs to Performance Evaluation of Parallel C Code

Oliver Oey (KIT)

14:45 – 15:30

Multi-Core Architectures targeted by ALMA Flow

Kim Sunesen (Recore)

15:30 – 16:00

Coffee break

16:00 – 16:20

Case study: Automatic parallelization of wireless applications

Nikolaos Mitas (ICOM)

16:20 – 16:40

Case study: Automatic parallelization of image processing applications

Thomas Perschke (IOSB)

16:40 – 17:30

Demonstration of the integrated ALMA Toolflow


Read more information on FPL'14 on their website ...

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